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System configuration registers
288
NS9750 Hardware Reference
ISRADDR register
Address: A090 0164
The ISRADDR register provides the current ISRADDR value.
The Interrupt Vector Address register for the FIQ interrupt must be assigned a unique
value. If this unique address is seen by the IRQ service routine, software must read
the ISRADDR register again. The correct IRQ interrupt service routine address is read
the second time.
Register bit assignment
Bits Access Mnemonic Reset Description
D31:00 R/W ISRA 0x0 Interrupt service routine address
A read to this register updates the priority logic
block, and masks the current and any lower priority
interrupt requests.
A write of any value to this register clears the mask,
to allow lower priority interrupts to become active.
Table 179: ISRADDR register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Interrupt service routine address (ISRA)
Interrupt service routine address (ISRA)