Digi NS9750 Computer Hardware User Manual


 
xi
DMA buffer descriptor ................................................................504
DMA channel assignments ............................................................509
DMA Control and Status registers ...................................................510
DMA Buffer Descriptor Pointer................................................512
DMA Control register ...........................................................514
DMA Status/Interrupt Enable register .......................................516
Chapter 10:
BBus Utility ............................................................................................ 521
BBus Utility Control and Status registers ..........................................522
Master Reset register...........................................................523
GPIO Configuration registers..................................................524
GPIO Control registers .........................................................529
GPIO Status registers...........................................................532
BBus Monitor register ..........................................................535
BBus DMA Interrupt Status register ..........................................536
BBus DMA Interrupt Enable register..........................................537
USB Configuration register ....................................................538
Endian Configuration register.................................................539
ARM Wake-up register..........................................................541
Chapter 11:
I2C Master/Slave Interface ................................................... 543
Overview ................................................................................544
Physical I2C bus .................................................................544
I2C external addresses................................................................545
I2C command interface...............................................................545
Locked interrupt driven mode ................................................546
Master module and slave module commands...............................546
Bus arbitration ..................................................................547
I2C registers ............................................................................547
Command Transmit Data register ............................................548
Status Receive Data register ..................................................549
Master Address register........................................................550
Slave Address register..........................................................551
Configuration register..........................................................552
Interrupt Codes ........................................................................553
Software driver ........................................................................555