Serial port control and status registers
666
NS9750 Hardware Reference
the Serial Channel FIFO Data register automatically clears the RRDY bit in Serial
Channel Status Register A.
Register bit assignment
Bits Access Mnemonic Reset Description
D31:00 R/W DATA 0x00000000 Serial channel FIFO data field.
Table 388: Serial Channel B/A/C/D FIFO Data register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
DATA
DATA