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PCI bus arbiter
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NS9750 Hardware Reference
The PCI Bridge PCI Error Address register stores the address of the PCI transaction
that received a PCI bus error response.
Register bit assignment
PCI Bridge Interrupt Status register
Address: A030 002C
The PCI Bridge Interrupt Status register shows the status of the AHB bus error
interrupt.
Bits Access Mnemonic Reset Description
D31:00 R PCIEADR
0x00000000
PCI error address
Holds the PCI address that caused an error, when any
of the PCI error bits are set in the PCI Status register.
No further updates are allowed to this register until all
error bits are cleared.
Table 270: PCI Bridge PCI Error Address register
PCIEADR
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
PCIEADR
Reserved
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
AHB
ERR