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BBus Bridge Control and Status registers
490
NS9750 Hardware Reference
BBus Bridge Control and Status registers
The BBus configuration registers are located at base address 0xA040.0000. All
configuration registers are accessed with zero wait states. Table 295 lists the
configuration and status registers in the BBus Bridge module. All configuration
registers must be accessed as 32-bit words and as single accesses only. Bursting is not
allowed.
Address Register
A040 0000 DMA Channel 1 Buffer Descriptor Pointer
A040 0004 DMA Channel 1 Control register
A040 0008 DMA Channel 1 Status and Interrupt Enable
A040 000C DMA Channel 1 Peripheral Chip Select
A040 0020 DMA Channel 2 Buffer Descriptor Pointer
A040 0024 DMA Channel 2 Control register
A040 0028 DMA Channel 2 Status and Interrupt Enable
A040 002C DMA Channel 2 Peripheral Chip Select
A040 0100 BBus Bridge Interrupt Status
A040 1004 BBus Bridge Interrupt Enable
Table 295: BBus Bridge module registers