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USB Global registers
724
NS9750 Hardware Reference
Device IP Programming Control/Status register
Address: 9010 0014
The Device IP Programming Control/Status register contains the USB device CSR
dynamic programming control and status information. The register allows you to
reconfigure the USB device when a SET_CFG or SET_INTF packet is received from the
USB host.
Register bit assignment
D01 RW1TC OHCI_IRQ 0 OHCI_IRQ
Asserted when the USB is configured for host operation
and the OHCI asserts an interrupt.
D00 N/A Reserved N/A N/A
Bits Access Mnemonic Reset Description
Table 420: Global Interrupt Status register
Bits Access Mnemonic Reset Description
D31:03 R Not used 0x00000000 This field is always read back as 0x00000000.
D02 R SETCSR 0 CSR programming start
Indicates when software can safely start
programming the registers.
Must be set to 1 before programming can begin.
D01 R/W DONECSR 0 CSR programming done
Indicates to the device IP that software has finished
programming the CSRs.
A value of 1 indicates that software is finished.
Table 421: Device IP Programming Control/Status register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved
SET
CSR
DONE
CSR
CSR
PRG