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Working with the CPU
The two least significant bits of the second-level descriptor indicate the descriptor
type; see Table 38.
Note:
Tiny pages do not support subpage permissions and therefore have only
one set of access permission bits.
Translating large page references
Figure 33 shows the complete translation sequence for a 64 KB large page.
[11:4] [11:4] [5:4] Access permission bits. See "Domain access control" on
page 98 and "Fault checking sequence" on page 99 for
information about interpreting the access permission bits.
[3:2] [3:2] [3:2] Indicate whether the area of memory mapped by this page
is treated as write-back cachable, write-through cachable,
noncached buffered, and noncached nonbuffered.
[1:0] [1:0] [1:0] Indicate the page size and validity, and are interpreted as
shown in Table 38, “Interpreting page table entry bits
[1:0],” on page 91.
Value Meaning Description
0 0 Invalid Generates a page translation fault.
0 1 Large page Indicates that this is a 64 KB page.
1 0 Small page Indicates that this is a 4 KB page.
1 1 Tiny page Indicates that this is a 1 KB page.
Table 38: Interpreting page table entry bits [1:0]
Bits
Large Small Tiny Description
Table 37: Second-level descriptor bits