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PCI-to-AHB Bridge
PCI Bridge AHB Error Address register
Address: A030 0024
The PCI Bridge AHB Error Address register stores the address of the AHB transaction
that received an AHB ERROR response.
Register bit assignment
PCI Bridge PCI Error Address register
Address: A030 0028
D01:00 R/W AHBBRST 0x1 AHB burst length control
Determines the type of burst cycles done when the
bridge acts as AHB master:
00 16
01 32 (default)
10 64
11 Reserved
Bits Access Mnemonic Reset Description
D31:00 R AHBEADR
0x00000000
AHB error address
Holds the AHB address that caused the error, when
AHBERR is set in the PCI Bridge Interrupt Status
register.
No further updates are allowed to this register until
AHBERR is cleared,
Table 269: PCI Bridge AHB Error Address register
Bits Access Mnemonic Reset Description
Table 268: PCI Bridge Configuration register
AHBEADR
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
AHBEADR