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Serial Channel B/A/C/D Control
register B
655
Serial Channel B/A/C/D FIFO Data
register
665
Serial Channel Status Register A 657
serial port control and status
registers
650
-
666
serial port performance 650
SPI timing diagrams 827
-
830
structure 644
transmit FIFO interface 647
serial controller, UART 601
-
639
bit-rate examples 628
-
629
bit-rate generator 603
features 602
FIFO management 605
-
608
receive FIFO interface 606
transmit FIFO interface 605
framing structure 604
functions 605
Serial Channel B/A/C/D Bit-rate
register
624
Serial Channel B/A/C/D Control
Register A
611
Serial Channel B/A/C/D Control
Register B
614
Serial Channel B/A/C/D FIFO Data
register
629
Serial Channel B/A/C/D Flow Control
Force register
638
Serial Channel B/A/C/D Flow Control
register
636
Serial Channel B/A/C/D Receive Buffer
GAP Timer register
630
Serial Channel B/A/C/D Receive
Character GAP Timer
register
632
Serial Channel B/A/C/D Receive Match
MASK register
635
Serial Channel B/A/C/D Receive Match
register
634
Serial Channel B/A/C/D Status
Register A
617
serial port control and status
registers
608
-
639
serial port performance 608
serial EEPROM boot 10
Serial Interface Engine 713
serial port control and status
registers
608
-
639, 650
-
666
SPI register addresses, serial
controllers B and A
650
SPI register addresses, serial
controllers C and D
651
UART register addresses, serial
controllers B and A
608
UART register addresses, serial
controllers C and D
610
serial port maximum rates, UART 608
serial port performance 608, 650
SHOULD BE ONE, SBO (CP15 registers) 53
SHOULD BE ZERO or PRESERVED, SBZP
(CP15 registers)
53
SHOULD BE ZERO, SBZ (CP15 registers) 53
signals
external pad interface
575
LCD module 42
PCI/CardBus 31
system memory interface 22
signals and interrupts, LCD 566
single combined interrupt 566
Slave Address register 551
slave module commands, I2C 546
slew rates, USB PHY 712
Software Watchdog Configuration
register
291
software watchdog timer 263
Software Watchdog Timer register 293
source address 475, 505