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Memory Controller
Support for all AHB burst types.
Little and big endian support.
Note:
Synchronous static memory devices (synchronous burst mode) are not
supported.
System overview
Figure 40 shows the NS9750 memory controller in a sample system.
Figure 40: NS9750 sample system
Note:
The largest amount of memory allowed for a single chip select is 256 MB.
PCI
Bridge/
Arbiter
CPU
System
Control
module
AHB
Arbiter
MAC
EFE
Memory
Controller
LCD
Controller
BBus
Bridge
BBus
DMA
I2C
Serial IO
module
UART/SPI
BBus
Utility
IEEE
1284
USB
AMBA AHB bus
NetSilicon BBus bus