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231
Memory Controller
D08 R/W EW Extended wait
0 Extended wait disabled (reset value on
reset_n)
Extended wait enabled
Extended wait uses the Static Extended Wait register (see page 224)
to time both the read and write transfers, rather than the Static
Memory Read Delay 0–3 registers (see page 236) and Static
Memory Write Delay 0–3 registers (see page 238). This allows
much longer transactions.
Extended wait also can be used with the
ta_strb signal to allow a slow
peripheral to terminate the access. In this case, the Static Memory
Extended Wait register (see page 224) can be programmed with the
maximum timeout limit. A high value on
ta_strb is then used to
terminate the access before the maximum timeout occurs.
Note: Extended wait and page mode cannot be selected
simultaneously.
Bits Access Mnemonic Description
Table 159: Static Memory Configuration 0–3 registers