www.digiembedded.com
537
BBus Utility
BBus DMA Interrupt Enable register
Address: 9060 0064
The BBus DMA Interrupt Enable register allows you to enable or disable the BBus DMA
interrupts on an individual basis. Writing a 1 enables the interrupt.
Register bit assignment
D02 R BINT3 0 BBus DMA channel #3 interrupt status
D01 R BINT2 0 BBus DMA channel #2 interrupt status
D00 R BINT1 0 BBus DMA channel #1 interrupt status
Bits Access Mnemonic Reset Description
Table 329: BBus DMA Interrupt Status register
Bits Access Mnemonic Reset Description
D31:16 R Not used 0x0 Always read as 0x0
D15 R/W BINT_EN16 0 BBus DMA channel #16 interrupt enable
D14 R/W BINT_EN15 0 BBus DMA channel #15 interrupt enable
D13 R/W BINT_EN14 0 BBus DMA channel #14 interrupt enable
D12 R/W BINT_EN13 0 BBus DMA channel #13 interrupt enable
D11 R/W BINT_EN12 0 BBus DMA channel #12 interrupt enable
D10 R/W BINT_EN11 0 BBus DMA channel #11 interrupt enable
D09 R/W BINT_EN10 0 BBus DMA channel #10 interrupt enable
D08 R/W BINT_EN9 0 BBus DMA channel #9 interrupt enable
Table 330: BBus DMA Interrupt Enable register
BINT_
EN14
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Not used
BINT_
EN16
BINT_
EN15
BINT_
EN13
BINT_
EN12
BINT_
EN11
BINT_
EN10
BINT_
EN9
BINT_
EN8
BINT_
EN7
BINT_
EN6
BINT_
EN5
BINT_
EN4
BINT_
EN3
BINT_
EN2
BINT_
EN1