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Registers
588
NS9750 Hardware Reference
LCDUPBASE is used for these displays:
TFT
Single panel STN
Upper panel of dual panel STN
LCDLPBASE is used for the lower panel of dual panel STN displays.
Important:
You must initialize LCDUPBASE (and LCDLPBASE for dual panels) before
enabling the LCD controller.
The base address value optionally can be changed mid-frame, to allow double-
buffered video displays to be created. These registers are copied to the
corresponding current registers at each LCD vertical synchronization, which then
cause the LNBU bit (in the LCDStatus register; see page 593) to be set and an optional
interrupt to be generated. The interrupt can be used to reprogram the base address
when generating double-buffered video.
Register bit assignment
Bits Access Mnemonic Reset Description
D31:02 R/W LCDUPBASE
0x00000000
LCD upper panel base address
Starting address of the upper panel frame data in
memory; the address is word-aligned.
D01:00 N/A Reserved N/A N/A
Table 355: LCDUPBASE register
13121110987654321015 14
Reserved
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
LCDUPBASE
LCDUPBASE