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169
Memory Controller
Table 97 shows the outputs from the memory controller and the corresponding inputs
to the 64M SDRAM (8Mx16, pins 13 and 14 used as bank selects).
11 11 23 -
10 10/AP 22 AP
99 21 -
88 20 -
77 19 9
66 18 8
55 17 7
44 16 6
33 15 5
22 14 4
11 13 3
00 12 2
Output address
(
ADDROUT)
Memory device
connections
AHB address to row
address
AHB address to
column address
14 BA1 11 11
13 BA0 12 12
12---
11 11 24 -
10 10/AP 23 AP
99 22 -
8 8 21 10
77 20 9
Table 97: Address mapping for 128 SDRAM (8Mx16, RBC)
Output address
(
ADDROUT)
Memory device
connections
AHB address to row
address
AHB address to
column address
Table 96: Address mapping for 128M SDRAM (4Mx32, RBC)