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287
System Control Module
Register bit assignment
BIts Access Mnemonic Reset Definition
D07 R/W IE 0x0 Interrupt enable
0 Interrupt is disabled
1 Interrupt is enabled
D06 R INV 0x0 Invert
0 Do not invert the level of the interrupt source.
1 Invert the level of the interrupt source.
D05 R/W IT 0x0 Interrupt type
0IRQ
1FIQ
D04:00 R/W ISD 0x0–
0x1F
Interrupt source ID
Assign an interrupt ID to each priority level. See
"Interrupt sources," beginning on page 268, for the list of
interrupt ID numbers.
Table 178: Int Config register
Interrupt source ID
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
IE INV IT
Int Config registers 0, 4, 8, 12, 16,
20, 24, 28
Int Config registers 1, 5, 9, 13, 17,
21, 25, 29
Int Config registers 2, 6, 10, 14, 18,
22, 26, 30
Int Config registers 3, 7, 11, 15, 19, 23, 27, 31