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Dynamic memory controller
186
NS9750 Hardware Reference
Table 118 shows the outputs from the memory controller and the corresponding
inputs to the 16M SDRAM (2Mx8, pin 13 used as bank select).
99 19 -
88 18 -
77 17 8
66 16 7
55 15 6
44 14 5
33 13 4
22 12 3
0 0 10 **
Output address
(
ADDROUT)
Memory device
connections
AHB address to row
address
AHB address to
column address
14 BA - -
13 - 10 10
12---
11---
10 10/AP 11 AP
99 21 -
88 20 9
77 19 8
66 18 7
55 17 6
Table 118: Address mapping for 16M SDRAM (2Mx8, RBC)
Output address
(
ADDROUT)
Memory device
connections
AHB address to row
address
AHB address to
column address
Table 117: Address mapping for 16M SDRAM (1Mx16, RBC)