BBus Utility Control and Status registers
528
NS9750 Hardware Reference
GPIO Configuration Register #1
Address: 9060 0010
GPIO Configuration register options
Bits Access Mnemonic Reset Description
D31:28 R/W gpio7 0x3 gpio[7] configuration
D27:24 R/W gpio6 0x3 gpio[6] configuration
D23:20 R/W gpio5 0x3 gpio[5] configuration
D19:16 R/W gpio4 0x3 gpio[4] configuration
D15:12 R/W gpio3 0x3 gpio[3] configuration
D11:08 R/W gpio2 0x3 gpio[2] configuration
D07:04 R/W gpio1 0x3 gpio[1] configuration
D03:00 R/W gpio0 0x3 gpio[0] configuration
Table 323: GPIO Configuration Register #1
Bits Access Mnemonic Description
D03 R/W PINd 0 Input
1 Output
Controls the direction of the GPIO pin. All GPIO pins reset to the
input state. In certain modes, the GPIO pin is bidirectional and
controlled by the selected peripheral.
D02 N/A Not used Must write 0.
Table 324: GPIO Configuration register options
gpio1
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
gpio7 gpio6 gpio5 gpio4
gpio3 gpio2 gpio0