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Registers
590
NS9750 Hardware Reference
Register bit assignment
LCDControl register
Address: A080 001C
The LCDControl register controls the mode in which the LCD controller operates.
Register bit assignment
Bits Access Mnemonic Reset Description
D31:05 N/A Reserved N/A N/A
D04 R/W MBERRINTRENB 0x0 AHB master bus error interrupt enable.
D03 R/W VCOMPINTRENB 0x0 Vertical compare interrupt enable.
D02 R/W LNBUINTRENB 0x0 Next base update interrupt enable.
D01:00 N/A Not used 0x0 Always write 0.
Table 357: LCDINTRENABLE register
Bits Access Mnemonic Reset Description
D31:17 N/A Reserved N/A N/A
Table 358: LCDControl register
Lcd
Pwr
BEBO
Lcd
Dual
LcdBpp
Lcd
En
13121110987654321015 14
Reserved
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved WTRMK
LcdVComp
BEPO BGR
Lcd
Mono
8
Lcd
TFT
Lcd
BW