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157
Memory Controller
Access: Write, little endian, 16-bit
external bus
System data mapping on to external
databus
Internal
transfer
width
DATA to HRDATA
HSIZE
[2:0]
HADD
R [1:0]
ADDROUT
[0]
BLSOU
T [1:0]
[31:24] [23:16] [15:8] [7:0]
Word (2
transfers
010 -- 1
0
00
00
--
-
-
-
[31:24]
[15:8]
[23:16]
[7:0]
Halfword 001 1- 1 00 - - [31:24] [23:16]
Halfword 001 0- 0 00 - - [15:8] [7:0]
Byte 000 11 1 01 - - [31:24] -
Byte 000 10 1 10 - - - [23:16]
Byte 000 01 0 01 - - [15:8] -
Byte 000 00 0 10 - - - [7:0]
Table 83: Little endian write, 16-bit external bus
Access: Write, little endian, 32-bit
external bus
System data mapping on to external
databus
Internal
transfer
width
DATA to HRDATA
HSIZE
[2:0]
HADDR
[1:0]
BLSOUT
[3:0]
[31:24] [23:16] [15:8] [7:0]
Word 010 -- 0000 [31:24] [23:16] [15:8] [7:0]
Halfword 001 1- 0011 [31:24] [23:16] - -
Halfword 001 0- 1100 - - [15:8] [7:0]
Byte 000 11 0111 [31:24] - - -
Byte 000 10 1011 - [23:16] - -
Table 84: Little endian write, 32-bit external bus