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Ethernet Control and Status registers
348
NS9750 Hardware Reference
MAC Configuration Register #1
Address: A060 0400
MAC Configuration Register #1 provides bits that control functionality within the
Ethernet MAC block.
D15 R RXCE 0x0 Receive carrier event previously seen
When set, indicates that a carrier event activity (an
activity on the receive channel that does not result in
a frame receive attempt being made) was found at
some point since the last receive statistics. A carrier
event results when the interface signals to the PHY
have the following values:
MRXER = 1
MRXDV = 0
RXD = 0xE
The event is being reported with this frame, although
it is not associated with the frame.
D14 R RXDV 0x0 Receive data violation event previously seen
Set when the last receive event was not long enough
to be a valid frame.
D13 R RXOK 0x0 Receive frame OK
Set when the frame had a valid CRC and no symbol
errors.
D12 R RXBR 0x0 Receive broadcast frame
Set when the frame has a valid broadcast address.
D11 R RXMC 0x0 Receive multicast frame
Set when the frame has a valid multicast address.
D10 N/A Reserved N/A N/A
D09 R RXDR 0x0 Receive frame has dribble bits
Set when an additional 1–7 bits are received after the
end of the frame.
Note: Ignore this bit with RMII applications.
D08:00 N/A Reserved N/A N/A
Bits Access Mnemonic Reset Description
Table 210: Ethernet Receive Status register