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221
Memory Controller
Dynamic Memory Exit Self-refresh register
Address: A070 0050
The Dynamic memory Exit Self-refresh register allows you to program the exit self-
refresh to active command time, t
XSR
. It is recommended that this register be
modified during system initialization, or when there are no current or outstanding
transactions. Wait until the memory controller is idle, then enter low-power or
disabled mode. This value normally is found in SDRAM datasheets as t
XSR
.
Note:
The Dynamic Memory Exit Self-refresh register is used for all four dynamic
memory chip selects. The worst case value for all the chip selects must be
programmed.
Register bit assignment
Bits Access Mnemonic Description
D31:05 N/A Reserved N/A (do not modify)
D04:00 R/W XSR Exit self-refresh to active time command
0x0–0x1E
n+1 clock cycles, where the delay is in CLK cycles.
0x1F
32 clock cycles (reset value on reset_n)
Table 152: Dynamic Memory Exit Self-refresh register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved XSR