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BBus slave and DMA interface
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NS9750 Hardware Reference
Register bit assignment
Port Status register, host
Address: 9040 0104
Register bit assignment
Bits Access Mnemonic Reset Description
D31:08 N/A Reserved N/A N/A
D07:00 R pd N/A Printer data pins
Allows the CPU to read the status of the 8-bit data bus
directly.
Table 399: pd — Printer Data Pins register
Bits Access Mnemonic Reset Description
D31:04 N/A Reserved N/A N/A
D03 R N_AUTOFD N/A Allows the CPU to read the status of the host control
pins directly.
The meaning of each bit varies, depending on whether
the mode is compatibility, nibble, byte, or ECP.
D02 R N_INIT N/A
D01 R N_SLCTIN N/A
D00 R N_STROBE N/A
Table 400: psr — Port Status register, host
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved
N_
AUTOFD
N_INIT
N_
SLCTIN
N_
STROBE