Filter
Top Products
Ethernet Control and Status registers
374
NS9750 Hardware Reference
Transmit byte counter (A060 06E0)
Incremented by the number of bytes that were put on the wire, including fragments
of frames that were involved with collisions. This count does not include preamble/
SFD or jam bytes.
Transmit packet counter (A060 06E4)
Incremented for each transmitted packet (including bad packets, excessive deferred
packets, excessive collision packets, late collision packets, and all unicast,
broadcast, and multicast packets).
Transmit multicast packet counter (A060 06E8)
Incremented for each multicast valid frame transmitted (excluding broadcast
frames).
Transmit broadcast packet counter (A060 06EC)
Incremented for each broadcast frame transmitted (excluding multicast frames).
Transmit deferral packet counter (A060 06F4)
Incremented for each frame that was deferred on its first transmission attempt. This
counter does not include frames involved in collisions.
D31:24 R Reset = Read as 0 Reserved
D23:00 R/W Reset = 0x000000 TBYT
D31:18 R Reset = Read as 0 Reserved
D17:00 R/W Reset = 0x00000 TPKT
D31:18 R Reset = Read as 0 Reserved
D17:00 R/W Reset = 0x00000 TMCA
D31:18 R Reset = Read as 0 Reserved
D17:00 R/W Reset = 0x00000 TBCA
D31:12 R Reset = Read as 0 Reserved
D11:00 R/W Reset = 0x000 TDFR