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Interrupt Codes
554
NS9750 Hardware Reference
2
hex
M_NO_ACK Master No acknowledge by slave
3
hex
M_TX_DATA Master TX data required in register TX_DATA
4
hex
M_RX_DATA Master RX data available in register RX_DATA
5
hex
M_CMD_ACK Master Command acknowledge interrupt
6
hex
N/A N/A Reserved
7
hex
N/A N/A Reserved
8
hex
S_RX_ABORT Slave The transaction is aborted by the master before
the slave performs a NO_ACK.
9
hex
S_CMD_REQ Slave Command request
A
hex
S_NO_ACK Slave No acknowledge by master (TX_DATA_REG is
reset)
B
hex
S_TX_DATA_1ST Slave TX data required in register TX_DATA, first byte
of transaction
C
hex
S_RX_DATA_1ST Slave RX data available in register RX_DATA, first byte
of transaction
D
hex
S_TX_DATA Slave TX data required in register TX_DATA
E
hex
S_RX_DATA Slave RX data available in register RX_DATA
F
hex
S_GCA Slave General call address
Code Name Master/slave Description
Table 342: Master/slave interrupt codes