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IEEE 1284 Peripheral Controller
IEEE 1284 General Configuration register
Address: 9040 0000
The IEEE 1284 General Configuration register contains miscellaneous control settings
for the IEEE 1284 module.
Register bit assignment
9040 016C – 9040 0170 Reserved
9040 0174 eca Forward Address register
9040 0178 pha Core Phase register
Address Register Description
Table 390: 1284 Control and Status registers
Bits Access Mnemonic Reset Description
D31:15 N/A Reserved N/A N/A
D14 R/W AFSH 0x0 HostAck signal handling
0
HostAck=1: Forward data bits 7 to 0 are stored in data
FIFO
HostAck=0: Forward data bits 7 to 0 are stored in
command FIFO
1 All forward data bits stored in data FIFO
You can use the core interrupt capability to detect
transitions on
HostAck.
Table 391: IEEE 1284 General Configuration register
CPS Rsvd FCRT FDRT Reserved RRT FCM Rsvd FDM RM
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Rsvd AFSH