Digi NS9750 Computer Hardware User Manual


 
Memory Management Unit (MMU)
104
NS9750 Hardware Reference
Disabling the MMU
Clear bit 0 (the M bit) in the R1: Control register to disable the MMU.
Note:
If the MMU is enabled, then disabled, then subsequently re-enabled, the
contents of the TLB are preserved. If these are now invalid, the TLB must
be invalidated before re-enabling the MMU (see "R8:TLB Operations
register" on page 68).
TLB structure
The MMU runs a single unified TLB used for both data accesses and instruction
fetches. The TLB is divided into two parts:
An eight-entry fully-associative part used exclusively for holding locked
down TLB entries.
A set-associative part for all other entries.
Whether an entry is placed in the set-associative part or lockdown part of the TLB
depends on the state of the TLB Lockdown register when the entry is written into the
TLB (see "R10: TLB Lockdown register" on page 73).
When an entry has been written into the lockdown part of the TLB, it can be removed
only by being overwritten explicitly or, when the MVA matches the locked down entry,
by an MVA-based TLB invalidate operation.
The structure of the set-associative part of the TLB does not form part of the
programmer’s model for the ARM926EJ-S processor. No assumptions must be made
about the structure, replacement algorithm, or persistence of entries in the
set-associative part — specifically:
Any entry written into the set-associative part of the TLB can be removed at
any time. The set-associative part of the TLB must be considered as a
temporary cache of translation/page table information. No reliance must be
placed on an entry residing or not residing in the set-associative TLB unless
that entry already exists in the lockdown TLB. The set-associative part of
the TLB can contain entries that are defined in the page tables but do not
correspond to address values that have been accessed since the TLB was
invalidated.
The set-associative part of the TLB must be considered as a cache of the
underlying page table, where memory coherency must be maintained at all