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Ethernet Control and Status registers
342
NS9750 Hardware Reference
Ethernet General Control Register #2
Address: A060 0004
Register bit assignment
D08 R/W ITXA 0 Insert transmit source address
0 Source address for Ethernet transmit frame taken
from data in TX_FIFO.
1 Insert the MAC Ethernet source address into the
Ethernet transmit frame source address field.
Set to force the MAC to automatically insert the Ethernet
MAC source address into the Ethernet transmit frame
source address. The SA1, SA2, and SA3 registers provide
the address information. When the ITXA bit is cleared, the
Ethernet MAC source address is taken from the data in the
TX_FIFO.
D07:00 N/A Reserved N/A N/A
Bits Access Mnemonic Reset Description
Table 206: Ethernet General Control Register #1
Bits Access Mnemonic Reset Description
D31:04 R/W Not used 0 Always write as 0.
Table 207: Ethernet General Control Register #2
Not used
T
CLER
STEN
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Not used
AUTO
Z
CLR
CNT