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Memory Controller
Dynamic Memory Self-refresh Exit Time register
Address: A070 0038
The Dynamic Memory Self-refresh Exit Time register allows you to program the self-
refresh exit time, t
SREX
. It is recommended that this register be modified during
system initialization, or when there are no current or outstanding transactions. Wait
until the memory controller is idle, then enter low-power or disabled mode. This
value normally is found in SDRAM data sheets as t
SREX
.
Note:
The Dynamic Memory Self-refresh Exit Time register is used for all four
dynamic memory chip selects. The worst case value for all chip selects
must be programmed.
Register bit assignment
Bits Access Mnemonic Description
D31:04 N/A Reserved N/A (do not modify)
D03:00 R/W SREX Self-refresh exit time (t
SREX
)
0x0–0xE
n+1 clock cycles, where the delay is in CLK cycles.
0xF
16 clock cycles (reset value on reset_n)
Table 146: Dynamic Memory Self-refresh Exit Time register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved SREX