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NS9750 Hardware Reference
LCD features
The NS9750 LCD controller provides these features:
Dual 64-deep, 32-bit wide FIFOs, for buffering incoming display data
Support for color and monochrome single- and dual-panel for Super Twisted
Nematic (STN) displays with 4- or 8-bit interfaces
Support for Thin Film Transistor (TFT) color displays
Resolution programmable up to 1024 x 768
15 gray-level mono, 3375 color STN, and 64K color TFT support
– Patented gray-scale algorithm
1, 2, or 4 bits-per-pixel (bpp) palettized displays for mono STN
1, 2, 4, or 8 bpp palettized color displays for color STN and TFT
16 bpp true-color non-palettized, for color STN and TFT
24 bpp true-color non-palettized for TFT
Programmable timing for different display panels
256 entry, 16-bit palette RAM, arranged as a 128 x 32-bit RAM
Frame, line, and pixel clock signals
AC bias signal for STN, data enable signal for TFT panels
Support for little and big endian, as well as Windows CE data formats
Programmable parameters
These key parameters are programmable:
Horizontal front and back porch
Horizontal synchronization pulse width
Number of pixels per line
Vertical front and back porch
Vertical synchronization pulse width
Number of lines per panel
Number of panel clocks per line