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Dynamic memory controller
170
NS9750 Hardware Reference
Table 98 shows the outputs from the memory controller and the corresponding inputs
to the 128M SDRAM (16Mx8, pins 13 and 14 used as bank selects).
66 19 8
55 18 7
44 17 6
33 16 5
22 15 4
11 14 3
00 13 2
Output address
(
ADDROUT)
Memory device
connections
AHB address to row
address
AHB address to
column address
14 BA1 13 13
13 BA0 12 12
12 12 - -
11 11 25 -
10 10/AP 24 AP
9 9 23 11
8 8 22 10
77 21 9
66 20 8
55 19 7
44 18 6
33 17 5
22 16 4
Table 98: Address mapping for 128 SDRAM (16Mx8, RBC)
Output address
(
ADDROUT)
Memory device
connections
AHB address to row
address
AHB address to
column address
Table 97: Address mapping for 128 SDRAM (8Mx16, RBC)