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695
IEEE 1284 Peripheral Controller
Register bit assignment
Feature Control Register B
Address: 9040 0118
You must set bit[0] to 1 in Feature Control Register B. Bits[31:01] are reserved.
Interrupt Enable register
Address: 9040 011C
The Interrupt Enable register enables interrupts to be generated on certain
conditions.
Register bit assignment
Bits Access Mnemonic Reset Description
D31:01 N/A Reserved N/A N/A
D00 R/W PPtEn 0x0 Printer port enable
0 Force IEEE 1284 outputs to high
impedance
1 Enable normal operation, depending on
mode
Table 403: fea — Feature Control Register A
Bits Access Mnemonic Reset Description
D31:06 N/A Reserved N/A N/A
Table 404: fei — Interrupt Enable register
PSInt
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved
Neg
Start
Trnsfr
Start
ECPCh
Addr
Reserved