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USB host block registers
746
NS9750 Hardware Reference
HcDoneHead register
Address: 9010 1030
The HcDoneHead register contains the physical address of the last completed transfer
descriptor that was added to the Done queue. In normal operation, the host
controller driver should not need to read this register as its content is written
periodically to the host controller communication area.
Register bit assignment
Bits Access Mnemonic Reset Description
D31:04 R DH 0h DoneHead
When a TD is completed, the host controller writes the
content of HcDoneHead to the NextTD field of the TD.
The host controller then overwrites the content of
HcDoneHead with the address of this TD.
This value is written to zero whenever the host controller
writes the content of this register to the host controller
communications area. It also sets the
WritebackDoneHead of the HcInterruptStatus register
(see "HcInterruptStatus register," beginning on page 733).
D03:00 N/A Not used 0 Must be written to 0.
Table 435: HcDoneHead register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
DH
Not usedDH