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491
BBus Bridge
Buffer Descriptor Pointer register
Address: A040 0000 / 0020
This register contains a 32-bit pointer to the first buffer descriptor in a contiguous list
of buffer descriptors. The BBus bridge contains a Buffer Descriptor Pointer register
for each DMA channel; each register is 16 bytes in length.
Register bit assignment
DMA Channel 1/2 Control register
Address: A040 0004 / 0024
This register contains required DMA transfer control information. The BBus bridge
contains a DMA Channel Control register for each channel.
Bit(s) Access Mnemonic Reset Description
D31:00 RW BuffDesc 0x00000000 Buffer descriptor
32-bit pointer to a buffer descriptor.
Table 296: Buffer Descriptor Pointer register bit definition
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
BuffDesc
BuffDesc
INDEX
13121110987654321015 14
Reserved
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
CG SB DB SINC_N DINC_NCE CA Not usedSW DW