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Registers
224
NS9750 Hardware Reference
Static Memory Extended Wait register
Address: A070 0080
The Static Memory Extended Wait register times long static memory read and write
transfers (which are longer than can be supported by the Static Memory Read Delay
registers (see page 236) or the Static Memory Write Delay registers (see page 238))
when the EW (extended wait) bit in the related Static Memory Configuration register
(see page 230) is enabled.
There is only one Static Memory Extended Wait register, which is used by the relevant
static memory chip select if the appropriate EW bit is set in the Static Memory
Configuration register.
It is recommended that this register be modified during system initialization, or when
there are no current or outstanding transactions. If necessary, however, these control
bits can be changed during normal operation.
Register bit assignment
Bits Access Mnemonic Description
D31:10 N/A Reserved N/A (do not modify)
D09:00 R/W EXTW External wait timeout
0x0
16 clock cycles, where the delay is in HCLK cycles
0x1–0x3FF
(n=1) x16 clock cycles
Table 155: Static Memory Extended Wait register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved EXTW