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DEFINITY Enterprise Communications Server Release 6
Maintenance for R6vs/si
555-230-127
Issue 1
August 1997
Maintenance Object Repair Procedures
Page 10-969PI-PT (Processor Interface Port)
10
PI-PT (Processor Interface Port)
PI-PT is the physical port on the TN765 Processor Interface circuit pack. If the
Processor Interface Link (PI LINK) MO raises an alarm that can be correlated to
an on-board port problem, then PI-PT is alarmed. In a system without High or
Critical Reliability, there are no tests that run directly on Processor Interface port.
The PI-LINK MO is responsible for the testing of the TN765 ports along with DCS
links, AUDIX links, ISDN links, etc. Refer to the PI-LINK (Processor Interface Link)
Maintenance documentation for details. In a High or Critical Reliability system,
Processor Interface port is used to test the ports on the Standby Processor
Interface circuit packs. If the test fails, a Major alarm is raised. More importantly,
if a software requested SPE-interchange takes place and an alarm is raised on
the Processor Interface port, then the interchange may abort due to alarm
severities.
Error Log Entries and Test to Clear Values
1. Where P is the port network number (1 for PPN only); C is the carrier designation (for example,
A or B for processor complex circuit packs); and S is the address of the slot in the carrier
where the circuit pack is located (for example, 1 or 2 for either the first or second Processor
Interface circuit packs).
MO Name (in
Alarm Log)
Alarm
Level Initial Command to Run
1
Full Name of MO
PI-PT MAJOR test interface PCS sh Processor Interface Port
PI-PT WARNING release data-module <ext> Processor Interface Port
Table 10-327. Processor Interface Port PI-PT Error Log Entries
Error
Type
Aux
Data Associated Test
Alarm
Level
On/Off
Board Test to Clear Value
0
1
0 Any Any Any test interface PCS sh r 1
1 Standby PI Port Test
(#404)
MAJOR ON test interface PCS sh
18 0 busyout
data-module <ext>
WARNING OFF release data-module
<ext>
123 (a) Any None MAJOR ON test link lnk-no
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