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DEFINITY Enterprise Communications Server Release 6
Maintenance for R6vs/si
555-230-127
Issue 1
August 1997
Maintenance Object Repair Procedures
Page 10-176BRI-PORT (ISDN-BRI Port), ABRI-PORT (ASAI ISDN-BRI Port)
10
This error can occur if signaling frames are being received from the Packet Bus
at a rate sufficient to overflow the receive buffers on the circuit pack for a port OR
if a hardware fault is causing the receive buffers not to be emptied properly by
the circuit pack. This test is useful for verifying the repair of the problem.
Clear Error Counters Test (#270)
This test is not an actual test in the strict sense of the word. There are various
error counters associated with each
BRI-PORT/ABRI-PORT/ATT-PORT/LGATE-PT/ATTE-PT. This test clears those
counters and triggers the auditing of Terminal Endpoint Identifier (TEI) values
and layer 3 reinitialization. This test is used only to send messages to the
BRI-PORT/ABRI-PORT/ATT-PORT/LGATE-PT/ATTE-PT and, therefore, should
neither abort nor fail.
Table 10-63. TEST #625 Receive FIFO Overflow Error Counter Test
Error
Code
Test
Result Description/ Recommendation
2000 ABORT Response to the test was not received from the circuit pack within the
allowable time period.
1. If the test aborts repeatedly a maximum of five times, reset the
circuit pack via the busyout board PCSS and reset board PCSS
commands.
2. If the test aborts again, replace the circuit pack.
2012 ABORT Internal System Error.
2100 ABORT Could not allocate the necessary system resources to run this test.
1. Retry the command at one-minute intervals a maximum of five
times.
2. If the test continues to fail, escalate the problem.
value FAIL The BRI-LINE circuit pack is still detecting errors of this type. The Error
Code field contains the value of this counter.
1. Retry the command at one-minute intervals a maximum of five
times.
2. If the test continues to fail, run the Long Test Sequence and pay
particular attention to the Loop Around Tests (#618 and #619). See
the repair procedures for the executed test if it fails. Otherwise, go
to the next step.
3. Replace the circuit pack.
PASS The Receive FIFO Overflow error counter was read correctly and has a
value of 0.
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