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DEFINITY Enterprise Communications Server Release 6
Maintenance for R6vs/si
555-230-127
Issue 1
August 1997
Maintenance Object Repair Procedures
Page 10-1092PROCR (TN790 RISC Processor Circuit Pack)
10
Processor Write Buffer Test (#900)
This test is a nondestructive test. This test verifies that the Write Buffer operates
properly on the Processor circuit pack. Failure of this test is serious. The
Processor circuit pack must be replaced as soon as possible.
Table 10-388. Test #896 Processor Cache Audit
Error
Code
Test
Result Description/ Recommendation
100 ABORT The test did not complete within the allowable time period.
1. Retry the command.
1029
2014
2015
2016
2017
2018
2020
2022
2024
2025
2051
ABORT Refer to STBY-SPE Maintenance documentation for a description of these
error codes.
2500 ABORT Internal system error
1. Retry the command.
FAIL The Cache Parity Error bit is set, there may be problems with either the
CPU or the Instruction or Data Cache.
1. Retry the command.
2. If the test continues to fail, run test processor a|b long.
3. If the Processor Cache test (#895) or the Processor Cache Audit
(#896) fails, replace the Processor circuit pack.
PASS The Processor has not detected any parity errors in the Instruction and
Data Caches since the last time this audit was run.
Continued on next page