Lucent Technologies R5SI Computer Hardware User Manual


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DEFINITY Enterprise Communications Server Release 5
Maintenance and Test for R5vs/si
555-230-123
Issue 1
April 1997
Maintenance Object Repair Procedures
Page 10-619DUPINT (Duplication Interface Circuit Pack)
10
Duplication Interface Circuit Pack SPE B Loop
Back Test (#276)
This test loops back data through the UART used to communicate with
Maintenance/Tape Processor B. The data is generated by the Duplication
Interface circuit pack processor and is looped through the UART. The test is
done entirely on the Duplication Interface circuit pack. The test passes if the data
sent matches the data received. This test does not check the physical serial
channel that is printed on the backplane or carried by the ICC.
Duplication Interface Circuit Pack Sanity Maze
Test (#277)
This test tests the Duplication Interface circuit pack processor’s ability to write
through the maze circuit. The Sanity Maze is a piece of circuitry on the
Duplication Interface circuit pack that the Duplication Interface circuit pack
Table 10-176. TEST #276 Duplication Interface Circuit Pack SPE B Loop Back Test
Error
Code
Test
Result Description/Recommendation
1000 ABORT System resources required to run this test are not available.
2000 ABORT Response to the test request was not received within the allowable time
period.
2033 ABORT Internal system error
1. Retry the command at 1-minute intervals a maximum of 5 times.
FAIL The tested UART on the Duplication Interface circuit pack is defective.
1. If this is Duplication Interface circuit pack A, then the circuit pack must
be replaced to restore duplication. If this is Duplication Interface circuit
pack B, then this failure has no real impact on the system. However,
since this Duplication Interface circuit pack can never be used in the A
carrier, it should be replaced at some point.
2. Replace the Duplication Interface circuit pack.
3. Rerun the test.
NO
BOARD
The Duplication Interface circuit pack has failed to handshake with either
the active Maintenance/Tape Processor (in the case of Duplication
Interface circuit pack A) or with Duplication Interface circuit pack A (in the
case of Duplication Interface circuit pack B).
1. Refer to NO BOARD description for the Duplication Interface Circuit
Pack Status Query Test (#315).
PASS The SPE B UART on the Duplication Interface circuit pack is good. This
implies that Duplication Interface circuit pack A should be able to
communicate with SPE B. This implies that Duplication Interface circuit
pack B has a good UART.
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