Lucent Technologies R5SI Computer Hardware User Manual


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DEFINITY Enterprise Communications Server Release 5
Maintenance and Test for R5vs/si
555-230-123
Issue 1
April 1997
Maintenance Object Repair Procedures
Page 10-1187PROCR (Processor Circuit Pack)
10
Processor Sanity Timer Test (#83)
This test is destructive.
Table 10-364. TEST #82 Processor Non-maskable Interrupt Test
Error
Code
Test
Result Description/ Recommendation
1029
2014
2015
2016
2017
2018
2020
2022
2024
2025
2051
ABORT Refer to STBY-SPE Maintenance documentation for a description of these
error codes.
FAIL The interrupt was not detected or acted upon.
1. Retry the command at 1-minute intervals a maximum of 5 times.
2. If the test continues to fail, the Processor circuit pack should be
replaced.
!
WARNING:
If the TN786B circuit pack [386 systems only] must be replaced, and if
there is a blank in the Expansion Memory circuit pack slot (that is, in
the slot immediately to the right of the TN786B circuit pack), remove
the blank before removing the circuit pack. Otherwise, the circuit pack
and/or the two connectors that are used to connect the Expansion
Memory circuit pack (if available) might become damaged.
3. If replacement of the Processor circuit pack still results in test failure, the
following circuit packs should be replaced, one at a time in the order
provided: TN770 Memory [G3iV1.1-286 only] Expansion Memory
[G3iV2-386 only] TN765 Processor Interface, TN777B Network Control,
TN778 Packet Control, and TN772 Duplication Interface circuit packs.
The test should then be repeated.
4. If the test still fails after you replace all the circuit packs discussed in the
previous step, the problem must be in the control carrier, and the carrier
should be replaced.
PASS The interrupt was correctly detected. The 80286/386 CPU chip is functioning
correctly.
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