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DEFINITY Enterprise Communications Server Release 5
Maintenance and Test for R5vs/si
555-230-123
Issue 1
April 1997
Maintenance Object Repair Procedures
Page 10-1227SHDW-CIR (Common Shadow Circuit)
10
SHDW-CIR (Common Shadow
Circuit)
The Common Shadow Circuit is that portion of the Duplication Interface circuit
pack that is responsible for memory shadowing in a High or Critical Reliability
system. All memory writes on the active SPE are detected by the Common
Shadow Circuit on the active Duplication Interface circuit pack via the Memory
Bus (M-BUS—bus used by control complex circuit packs to write/read memory
and to communicate with one another). The write information is then passed to
the Common Shadow Circuit on the Standby Duplication Interface circuit pack
via the ICC which then executes the write into the Standby Memory circuit pack
via the Standby M-BUS. In this way, the Standby SPE is kept up-to-date with the
Active SPE and, as a result, is always ready to take over for the Active SPE.
Refer to DUPINT (Duplication Interface Circuit Pack) Maintenance
documentation for a detailed description of SPE-to-SPE connectivity and
STBY-SPE (Standby SPE) Maintenance documentation for a description of how
the Standby SPE is maintained.
1. Determine the carrier to test via the Port field from the Alarm or Error Log.
MO Name (in
Alarm Log)
Alarm
Level
Initial Command to
Run Full Name of MO
SHDW-CIR
1
MAJOR test duplication 1C sh Common Shadow Circuit