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DEFINITY Enterprise Communications Server Release 5
Maintenance and Test for R5vs/si
555-230-123
Issue 1
April 1997
Reliability Systems: A Maintenance Aid
Page 6-8Duplication Concepts
6
out-of-service bus are maintained, but no new calls are assigned to the
out-of-service bus.
In addition to the system software’s ability to detect a defective bus and perform
a TDM Bus switch, the user also has the ability to specify if and when a
scheduled control channel switch is to be performed.
Packet Bus Redundancy
The Packet Bus is used to provide ISDN-BRI signaling via the TN778 Packet
Control circuit pack. The Packet Bus is not physically duplicated in the same way
that the TDM Bus is duplicated. However, there are several spare leads on the
Packet Bus itself that are not normally used. In a High or Critical Reliability
system that is using the Packet Bus, a TN771 Maintenance/Test circuit pack is
provided for each port network. The Maintenance/Test circuit pack has the ability
to test the Packet Bus and discover shorted or open leads on the Packet Bus.
When such a fault is discovered, the Maintenance/Test circuit pack sends a
message to each circuit pack that uses the Packet Bus, instructing that circuit
pack to use one of the spare leads in place of the defective lead.
The Maintenance/Test circuit pack can recover up to three Packet Bus lead
failures by this mechanism. This provides high availability by decreasing the
chance of a blocking Packet Bus fault by two orders of magnitude.
The Maintenance/Test circuit pack has other capabilities, primarily with respect
to ISDN-PRI Test Call features. Because of these other capabilities, the
Maintenance/Test circuit pack is available as an option in Standard Reliability
systems or in High and Critical Reliability systems that are not using the Packet
Bus. In such systems, the Packet Bus redundancy capabilities of the
Maintenance/Test circuit pack are NOT enabled.
Duplication Concepts
High and critical reliability systems employ several concepts of duplication.
These are described in the following sections.
Memory Shadowing
Most of the time the Standby SPE is in a mode known as Standby Mode (see
‘‘
SPE Modes’’ section) in which it is ready to assume the role of the Active SPE.
To be ready to assume the role of the Active SPE. PR-MEM Release 5vs/si and
later must be an up-to-date reflection of Active SPE Memory. This is
accomplished by the memory shadowing mechanism.
The SHDW-CIR (Common Shadow Circuitry) on the Active SPE TN772 DUPINT
(Duplication Interface) detects all memory writes that the Active SPE PROCR
(Processor) makes to Active SPE Memory. The Active SPE Common Shadow