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DEFINITY Enterprise Communications Server Release 5
Maintenance and Test for R5vs/si
555-230-123
Issue 1
April 1997
Maintenance Object Repair Procedures
Page 10-1140PR-MAINT (Maintenance Processor [TN790 RISC Systems])
10
System Technician-Demanded Tests:
Descriptions and Error Codes
Always investigate tests in the order presented in the table below. By clearing
error codes associated with the
MTP Reset Test,
for example, you may also clear
errors generated from other tests in the testing sequence. The following table is
for the TN790 [RISC] System.
Notes:
a. Refer to PROCR (TN790 RISC Processor) for a description of these tests.
b. Refer to PR-MEM (TN790 RISC Memory) for a description of these tests.
c. This test is run only on the standby SPE in a high or critical reliability
system. On other systems or on the Active SPE, the test is run only via a
reset system 4 command or a reset system 5 command.
1. D = Destructive; ND = Nondestructive
Order of Investigation
Short Test
Sequence
Long Test
Sequence D/ND
1
Processor Cache Test (#895)(a) X ND
Processor Cache Audit (#896)(a) X X ND
Processor Bus Time-out Exception Test (#82)(a) X X ND
Processor BOOTPROM Checksum Test (#80)(a) X X ND
Processor Write Buffer Test (#900)(a) X X ND
Memory Burst Read Test (#908)(a) X X ND
Read All Memory Test (#85)(a) X ND
Memory Parity Error Detection Test (#87)(a) X X ND
Flash Memory Checksum Test (#86)(a) X ND
Memory Functional Test (#332) (b)(c) X D
MTP Outpulse Relay Test (#102)(d) X X ND
External Modem Present Test (#230)(d)(e) X X ND
MTP Analog Loop Around Test (#103)(d) X X ND
MTP Sanity Handshake Test (#106) X X ND
MTP SAT Loop Around Test (#228) X X ND
MTP Aux Loop Around Test (#229) X X ND
MTP Reset Test (#101) X D
MTP Dual Port Ram Test (#104)(d) X D
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